Reference

Glossary

The terms used across the site, in a sentence or two each. Follow a link to the chapter that shows the idea at work.

A

AC coupling: Blocking the DC part of a signal with a high-pass filter. The TIA's offset-cancel loop does this, removing output 1's carrier pedestal but letting the baseline follow the data's running mean. Chapter 7: DC balance →
Achromatic: Independent of wavelength. An achromatic mesh would give every channel the same transform; the modelled mesh is not, because its phases are optical path lengths divided by the wavelength. Chapter 18: Many wavelengths, one mesh →
Amdahl bound: The largest speed-up possible when only part of the work gets faster: if a fraction $f$ of the time is accelerated infinitely, the whole runs at most $1/(1 - f)$ times faster. Chapter 10: Is it worth it? The break-even explorer →
AWG (arrayed-waveguide grating): Arrayed-waveguide grating: a passive demultiplexer that spreads wavelengths across output waveguides by interference in an array of paths of different lengths. The alternative to resonant (ring) selection. Chapter 18: Many wavelengths, one mesh →

B

Balanced detection: Two photodiodes on the two outputs of a coupler, their currents subtracted. Terms common to both (the LO's own power, the signal's own power) cancel; the cross term, the product of signal and LO, doubles. Chapter 4: Homodyne detection →
Baseline wander: Slow drift of the decision baseline when an AC-coupled receiver sees data whose average is not mid-level. Long runs of one word make it worst. Chapter 7: DC balance →
Baud: Symbols per second on a lane. With NRZ each symbol carries one bit; with PAM4, two. Chapter 1: The module end to end →
Bit plane: All the bits of one significance across a vector of operands. The optical core sees one 4-bit plane per symbol slot, so a w-bit operand takes w slots. Chapter 8: From a 4-point kernel to an NTT →
Bootstrap (CKKS): The operation that refreshes a ciphertext's noise budget so computation can continue. In OpenFHE it runs as ModRaise, CoeffToSlot, EvalMod and SlotToCoeff, dominated by NTTs and key switching. Chapter 9: A real workload: an FHE bootstrap →
Butterfly (radix-4): The building block of a radix-4 NTT: a 4-point transform of four inputs followed by twiddle multiplies. The optical core computes the 4-point transform part. Chapter 8: From a 4-point kernel to an NTT →

C

Calibration: Setting the heaters so the mesh computes the intended transform. The simulator scans each heater in mesh order against a truth table of the 16 inputs and passes when every level is within half a step. Chapter 6: Skew, drift and calibration →
Carrier pedestal: The constant current on output 1 that comes from light present even for a 0 bit (the MZM at quadrature is never dark). It costs receiver range unless removed. Chapter 2: Modulators →
Channel spacing: The distance between neighbouring wavelength channels, as a frequency $\Delta f$ or directly in nanometres; in wavelength, $\Delta\lambda = \lambda_0^2 \Delta f / c$ . A plan of W channels spans $W\,\Delta\lambda$ . Chapter 18: Many wavelengths, one mesh →
CKKS: An approximate-arithmetic homomorphic encryption scheme over polynomial rings, used for real-valued data. Its ciphertexts are stored as residues modulo several primes (limbs). Chapter 9: A real workload: an FHE bootstrap →
CoeffToSlot / SlotToCoeff: The linear-transform stages of a CKKS bootstrap. They use many rotations and so many key switches, which makes them heavy on memory traffic. Chapter 9: A real workload: an FHE bootstrap →

D

Decode table: A 256-entry lookup from four received PAM4 symbols to the exact DFT, with a valid flag. Only the 16 entries reachable from a 4-bit input are valid, so most analogue errors land on invalid entries and are detected. Chapter 5: The receiver and decisions →
DFT (discrete Fourier transform): The discrete Fourier transform. The 4-point DFT of four bits has small integer (Gaussian-integer) outputs, which is what makes an exact digital decode possible. Chapter 3: The optical Fourier transform →
Digit reversal: The output order of a decimation-in-frequency radix-4 NTT: indices with their base-4 digits reversed. Re-indexing on the FPGA is free. Chapter 8: From a 4-point kernel to an NTT →

E

E_conv (conversion energy): The energy of one optical-electrical crossing of the hybrid bond, per bit, in either direction: a modulator drive on the way in, a decision on the way out. An exact radix-4 butterfly costs $4w(1 + b_{\text{out}})$ crossings at $w$ bits. Chapter 14: Energy per useful operation →
ENOB (effective number of bits): Effective number of bits: the precision a converter, or a whole computation, really delivers, from its signal-to-noise ratio as $(\mathrm{SNR}_{\mathrm{dB}} - 1.76)/6.02$ . Chapter 17: Approximate mode →
Equal-logic and equal-silicon ASIC: The two all-digital baselines of Part II, in the same node as the stacked chip. The equal-logic ASIC has the chip's logic layer and no photonics; the equal-silicon ASIC spends the photonic layer's area on more butterfly units. Chapter 13: Break-even at scale →
EvalMod: The stage of a CKKS bootstrap that evaluates a polynomial approximation of modular reduction; NTT-heavy and compute-bound on the FPGA. Chapter 9: A real workload: an FHE bootstrap →
Exact and approximate mode: Exact mode (FHE) decides, recombines and reduces every radix-4 stage in logic before its twiddles, so each stage converts. Approximate mode (FFT/AI-style work) keeps values analogue and chains S stages between conversions, at a cost in precision. Chapter 17: Approximate mode →
Eye opening: How far apart the received levels stay at the sampling instant once interference and skew are included, as a fraction of the ideal spacing. A closed eye means decisions fail even without noise. Chapter 6: Skew, drift and calibration →

F

Frame inversion: Sending a whole frame as 1 − x when that pulls the running digital sum back towards zero, signalled by one flag. Because $\mathrm{DFT}(1 - x) = 4\delta - X$ , one flag negates every output's deviation at once. Chapter 7: DC balance →
Free spectral range (FSR) (FSR): The wavelength period of a ring resonator, $\lambda_0^2 / (n_g\, 2\pi R)$ : a ring picks out its channel again one FSR away, so every channel of a plan must fit inside one FSR or two channels alias onto the same ring. Chapter 18: Many wavelengths, one mesh →

H

HBM (high-bandwidth memory): High-bandwidth memory stacked beside the FPGA. In the bootstrap it holds limbs, evaluation keys and plaintexts, and its bandwidth binds the key-switch-heavy stages. Chapter 9: A real workload: an FHE bootstrap →
Heater: A thermo-optic phase shifter: current warms a waveguide and shifts the phase of light through it. The mesh's couplers, phases and LO phases are set by heaters. Chapter 6: Skew, drift and calibration →
Homodyne detection: Mixing a signal with light at the same frequency (the LO) on photodiodes so that the photocurrent is proportional to one quadrature of the signal's field. Chapter 4: Homodyne detection →
Hybrid bonding: Joining two dies face to face with direct copper-to-copper pads at micrometre pitch, so that signals pass between them without a package. The future chip's photonic layer is hybrid-bonded onto its logic. Chapter 12: From a module to a stacked chip →

J

j → ω: Replacing the imaginary unit j by a square root of −1 modulo p. It turns the exact complex output of the optical DFT into the output of a 4-point NTT. Chapter 8: From a 4-point kernel to an NTT →

K

Key switching: Re-encrypting part of a ciphertext under a different key using an evaluation key; it follows multiplications and rotations, and moves large keys through memory. Chapter 9: A real workload: an FHE bootstrap →

L

Limb (RNS tower): One residue polynomial of a CKKS ciphertext, modulo one prime of the RNS basis (also called a tower). Each limb needs its own NTTs. Chapter 9: A real workload: an FHE bootstrap →
LO (local oscillator): A reference beam at the signal's frequency. Here it is split from the same laser that feeds the modulators, so its phase follows the signal's (self-homodyne). Chapter 4: Homodyne detection →
Local oscillator path matching (LO path matching): Making the signal and LO paths of a self-homodyne receiver equally long. Any mismatch gives the LO a phase that grows with wavelength, so with many channels the paths must match to a small fraction of a micrometre, or each channel's LO must be trimmed. Chapter 18: Many wavelengths, one mesh →

M

MEMS and non-volatile phase shifters: Low-power alternatives to thermo-optic heaters. A MEMS shifter moves a structure electrostatically and holds with almost no power; non-volatile trimming writes a phase once and holds it at zero power, but each write is slow. Chapter 15: Light and heat →
Micro-ring (ring resonator): A small looped waveguide that couples strongly to one wavelength and lets the others pass. Used as a wavelength-selective modulator or demux filter; smaller rings have a wider free spectral range. Chapter 18: Many wavelengths, one mesh →
ModRaise: The first stage of a CKKS bootstrap, lifting the ciphertext to a larger modulus; mostly NTTs. Chapter 9: A real workload: an FHE bootstrap →
MZM (Mach–Zehnder modulator): A Mach–Zehnder modulator: an interferometer whose arm phase difference, set by a drive voltage, controls the transmitted field. Biased at quadrature, a bit moves it between two field levels. Chapter 2: Modulators →

N

NRZ: Non-return-to-zero: one bit per symbol, two levels. The host sends the four bit planes to the module on four NRZ lanes. Chapter 1: The module end to end →
NTT (number-theoretic transform): The number-theoretic transform: a DFT over integers modulo a prime, exact and used to multiply polynomials quickly in lattice cryptography. Chapter 8: From a 4-point kernel to an NTT →

O

OFT (optical Fourier transform): The module's passive interferometer: couplers and phase shifters arranged as a butterfly so that the four output fields are the DFT of the four input fields, computed in one pass of light. Chapter 3: The optical Fourier transform →
Output-phase trim: One phase per output port per channel, set by per-channel LOs after the demux filters, that brings each channel's transform closest to the DFT. It corrects only where a receiver reads the mesh, not inside a chained block. Chapter 18: Many wavelengths, one mesh →

P

PAM4: Four-level pulse-amplitude modulation: two bits per symbol. The module returns each receiver's level as one PAM4 symbol; the top level of outputs 1 and 3 is clipped. Chapter 5: The receiver and decisions →
Parity recovery: Resolving a clipped symbol without the table: outputs 1 and 3 share the parity of Re X1 + Im X3, which tells which of the two top levels was sent. Chapter 5: The receiver and decisions →
PCIe: The host link between the server and the FPGA card. In the bootstrap model only ciphertexts cross it. Chapter 9: A real workload: an FHE bootstrap →
Pilot tracker: A slow loop that perturbs each heater slightly and nudges it back towards its calibrated point while data flows, so that drift does not force a full recalibration. Chapter 6: Skew, drift and calibration →
Public statement (source tag): A source tag for something the developer has said in public about its next system: not a measurement and not a paper figure. In this simulator it marks only that the photonic layer is stacked on its logic. Chapter 12: From a module to a stacked chip →

Q

QSFP56: The pluggable port carrying the four lanes between the FPGA card and the module. Its bandwidth limits how fast bit planes can be sent once the optics speed up. Chapter 9: A real workload: an FHE bootstrap →
Quadrature bias: Biasing an MZM halfway between full and zero transmission, where its response to the drive is most linear. Chapter 2: Modulators →

R

Recombination (shift-and-add): Rebuilding a w-bit result from the per-plane outputs: $\sum_b 2^b\,y_b$ over the plane outputs $y_b$ . It runs on the FPGA and its cost decides break-even. Chapter 8: From a 4-point kernel to an NTT →
Relative offset δ: A channel's distance from the centre wavelength as a fraction of it, $\delta = (\lambda - \lambda_0)/\lambda_0$ . To first order every mesh phase errs in proportion to δ, so the transform error tilts linearly across the band. Chapter 18: Many wavelengths, one mesh →
Roofline: A plot of attainable throughput against arithmetic intensity (operations per byte): below a ridge point memory bandwidth binds, above it compute does. Chapter 9: A real workload: an FHE bootstrap →
Running digital sum: The accumulated deviation of the sent data from mid-level. The frame-inversion encoder keeps its vector over all four outputs small. Chapter 7: DC balance →

S

Self-homodyne: Homodyne detection where the LO comes from the same laser as the signal, so laser phase noise largely cancels; what remains depends on the path-length mismatch. Chapter 4: Homodyne detection →
SER / WER: Symbol error rate (one output's symbol wrong) and word error rate (any of the four wrong). The simulator's target is one symbol error in a million. Chapter 5: The receiver and decisions →
Skew: A timing offset between lanes. With limited channel bandwidth, a skewed lane is sampled away from its peak and interferes with its neighbours in time. Chapter 6: Skew, drift and calibration →
Source tag: The provenance label every model parameter carries: paper, patent, datasheet, textbook or illustrative. Illustrative values are modelling choices, never measurements. Method: model card →
Splitter tree: A binary tree of 1×2 power splitters that divides one laser among every modulator and LO port. Each level halves the power and adds a little excess loss, so more units need more lasers. Chapter 15: Light and heat →

T

TEC (thermoelectric cooler): A thermoelectric (Peltier) cooler. It can hold a chip's mean temperature but not the differences across it, and phases depend on those differences. Chapter 15: Light and heat →
TIA (transimpedance amplifier): Transimpedance amplifier: turns the balanced pair's current into a voltage for the decision circuit. Its noise, range and compression set the receiver's limits. Chapter 5: The receiver and decisions →
Twiddle factor: A power of the root of unity multiplied into butterfly outputs between NTT stages. Twiddles stay on the FPGA even when the 4-point kernel is optical. Chapter 8: From a 4-point kernel to an NTT →

U

UI (unit interval): One symbol period. Skew and sampling offsets are measured in fractions of a UI. Chapter 6: Skew, drift and calibration →

W

WDM (wavelength-division multiplexing): Wavelength-division multiplexing: several wavelengths (channels) of light travelling in one waveguide, each carrying its own data. In Part II's chip, W wavelengths share each unit's mesh; rings put each colour on its own modulator and demux filters separate them again. Chapter 18: Many wavelengths, one mesh →